34e1dda3fe
The version number was actually a single day off -- but otherwise the commit hash, etc didn't change. arachne-pnr development is effectively halted, but this is a nice touchup anyway. Signed-off-by: Austin Seipp <aseipp@pobox.com>
45 lines
1.3 KiB
Nix
45 lines
1.3 KiB
Nix
{ stdenv, fetchFromGitHub, icestorm }:
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with builtins;
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stdenv.mkDerivation rec {
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name = "arachne-pnr-${version}";
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version = "2018.09.09";
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src = fetchFromGitHub {
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owner = "yosyshq";
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repo = "arachne-pnr";
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rev = "840bdfdeb38809f9f6af4d89dd7b22959b176fdd";
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sha256 = "1dqvjvgvsridybishv4pnigw9gypxh7r7nrqp9z9qq92v7c5rxzl";
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};
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enableParallelBuilding = true;
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makeFlags =
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[ "PREFIX=$(out)"
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"ICEBOX=${icestorm}/share/icebox"
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];
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patchPhase = ''
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substituteInPlace ./Makefile \
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--replace 'echo UNKNOWN' 'echo ${substring 0 10 src.rev}'
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'';
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meta = {
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description = "Place and route tool for FPGAs";
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longDescription = ''
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Arachne-pnr implements the place and route step of
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the hardware compilation process for FPGAs. It
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accepts as input a technology-mapped netlist in BLIF
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format, as output by the Yosys [0] synthesis suite
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for example. It currently targets the Lattice
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Semiconductor iCE40 family of FPGAs [1]. Its output
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is a textual bitstream representation for assembly by
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the IceStorm [2] icepack command.
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'';
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homepage = https://github.com/cseed/arachne-pnr;
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license = stdenv.lib.licenses.mit;
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maintainers = with stdenv.lib.maintainers; [ shell thoughtpolice ];
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platforms = stdenv.lib.platforms.linux;
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};
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}
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