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trellis: 2018.08.01 -> 2018.12.20, update, cleanup

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Signed-off-by: Austin Seipp <aseipp@pobox.com>
This commit is contained in:
Austin Seipp 2019-01-08 16:56:16 -06:00
parent 651679c257
commit d67cbe9e53
1 changed files with 32 additions and 27 deletions
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59
pkgs/development/tools/trellis/default.nix
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@ -1,49 +1,54 @@
{ stdenv, fetchFromGitHub, python3, cmake, boost }:
{ stdenv, fetchFromGitHub
, python3, boost
, cmake
}:
let
trellisdb = fetchFromGitHub {
owner = "SymbiFlow";
repo = "prjtrellis-db";
rev = "06b429ddb7fd8ec1e3f2b35de2e94b4853cf2835";
sha256 = "07bsgw5x3gq0jcn9j4g7q9xvibvz6j2arjnvgyrxnrg30ri9q173";
};
boostWithPython3 = boost.override { python = python3; enablePython = true; };
in
stdenv.mkDerivation rec {
name = "trellis-${version}";
version = "2018.08.01";
version = "2018.12.20";
buildInputs = [
(boost.override { python = python3; enablePython = true; })
srcs = [
(fetchFromGitHub {
owner = "symbiflow";
repo = "prjtrellis";
rev = "b947028a6ac6494b6000c6e1ab5aa0db813e8544";
sha256 = "14dcsl2drx3xaqvpawp0j7088cijxcr5018yji48rmbl85763aw9";
name = "trellis";
})
(fetchFromGitHub {
owner = "symbiflow";
repo = "prjtrellis-db";
rev = "670d04f0b8412193d5e974eea67f2bb7355aa1ec";
sha256 = "1hm385rg1jq9qbq63g5134gq9xpfadvpahxvzwpv0q543brkg730";
name = "database";
})
];
sourceRoot = "trellis";
nativeBuildInputs = [
cmake python3
];
buildInputs = [ boostWithPython3 ];
nativeBuildInputs = [ cmake python3 ];
src = fetchFromGitHub {
owner = "SymbiFlow";
repo = "prjtrellis";
rev = "fff9532fe59bf9e38b44f029ce4a06c607a9ee78";
sha256 = "0ycw9fjf6428sf5x8x5szn8fha79610nf7nn8kmibgmz9868yv30";
};
preConfigure = with builtins; ''
rmdir database && ln -sfv ${elemAt srcs 1} ./database
preConfigure = ''
source environment.sh
cp -RT "${trellisdb}" database
cd libtrellis
'';
meta = {
description = "Documentation and tools for Lattice ECP5 FPGAs";
meta = with stdenv.lib; {
description = "Documentation and bitstream tools for Lattice ECP5 FPGAs";
longDescription = ''
Project Trellis documents the Lattice ECP5 architecture
to enable development of open-source tools. Its goal is
to provide sufficient information to develop a free and
open Verilog to bitstream toolchain for these devices.
'';
homepage = https://github.com/SymbiFlow/prjtrellis;
license = stdenv.lib.licenses.isc;
maintainers = with stdenv.lib.maintainers; [ q3k ];
platforms = stdenv.lib.platforms.linux;
homepage = https://github.com/symbiflow/prjtrellis;
license = stdenv.lib.licenses.isc;
maintainers = with maintainers; [ q3k thoughtpolice ];
platforms = stdenv.lib.platforms.linux;
};
}