From 0d9a6e2da5a51e4cada209159f7d8a23028e602d Mon Sep 17 00:00:00 2001
From: Drew Risinger <drewrisinger@users.noreply.github.com>
Date: Thu, 10 Sep 2020 09:09:34 -0400
Subject: [PATCH 1/2] verilog: cleanup

Meta attributes were out of date or not in current style,
and some attributes of derivation were redundant.
---
 pkgs/applications/science/electronics/verilog/default.nix | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/pkgs/applications/science/electronics/verilog/default.nix b/pkgs/applications/science/electronics/verilog/default.nix
index 082d44ddc6e0..37f7ca70a466 100644
--- a/pkgs/applications/science/electronics/verilog/default.nix
+++ b/pkgs/applications/science/electronics/verilog/default.nix
@@ -15,11 +15,6 @@ stdenv.mkDerivation rec {
 
   enableParallelBuilding = true;
 
-  prePatch = ''
-    substituteInPlace configure.in \
-      --replace "AC_CHECK_LIB(termcap, tputs)" "AC_CHECK_LIB(termcap, tputs)"
-  '';
-
   preConfigure = ''
     chmod +x $PWD/autoconf.sh
     $PWD/autoconf.sh
@@ -31,9 +26,8 @@ stdenv.mkDerivation rec {
 
   meta = with stdenv.lib; {
     description = "Icarus Verilog compiler";
-    repositories.git = "https://github.com/steveicarus/iverilog.git";
     homepage = "http://iverilog.icarus.com/";
-    license = licenses.lgpl21;
+    license = with licenses; [ gpl2Plus lgpl21Plus] ;
     maintainers = with maintainers; [ winden ];
     platforms = platforms.all;
   };

From ba886f7b1a7fd0de222cd58c99d3ec1e72245e91 Mon Sep 17 00:00:00 2001
From: Drew Risinger <drewrisinger@users.noreply.github.com>
Date: Thu, 10 Sep 2020 09:10:01 -0400
Subject: [PATCH 2/2] verilog: add tests

Run recommended self-tests from iverilog's CI.

Tests add about a minute to the build time on local machine
(2 -> 3 mins).
---
 .../science/electronics/verilog/default.nix   | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/pkgs/applications/science/electronics/verilog/default.nix b/pkgs/applications/science/electronics/verilog/default.nix
index 37f7ca70a466..df1ce7b7235f 100644
--- a/pkgs/applications/science/electronics/verilog/default.nix
+++ b/pkgs/applications/science/electronics/verilog/default.nix
@@ -1,7 +1,17 @@
 { stdenv, fetchFromGitHub, autoconf, gperf, flex, bison, readline, ncurses
 , bzip2, zlib
+# Test inputs
+, perl
 }:
 
+let
+  iverilog-test = fetchFromGitHub {
+    owner = "steveicarus";
+    repo = "ivtest";
+    rev = "6882cb8ec08926c4e356c6092f0c5f8c23328d5c";
+    sha256 = "04sj5nqzwls1y760kgnd9c2whkcrr8kvj9lisd5rvk0w580kjb2x";
+  };
+in
 stdenv.mkDerivation rec {
   pname = "iverilog";
   version = "unstable-2020-08-24";
@@ -24,6 +34,28 @@ stdenv.mkDerivation rec {
 
   buildInputs = [ readline ncurses bzip2 zlib ];
 
+  # tests from .travis.yml
+  doCheck = true; # runs ``make check``
+  # most tests pass, but some that rely on exact text of floating-point numbers fail on aarch64.
+  doInstallCheck = !stdenv.isAarch64;
+  installCheckInputs = [ perl ];
+
+  installCheckPhase = ''
+    # copy tests to allow writing results
+    export TESTDIR=$(mktemp -d)
+    cp -r ${iverilog-test}/* $TESTDIR
+
+    pushd $TESTDIR
+
+    # Run & check tests
+    PATH=$out/bin:$PATH perl vvp_reg.pl
+    # Check the tests, will error if unexpected tests fail. Some failures MIGHT be normal.
+    diff regression_report-devel.txt regression_report.txt
+    PATH=$out/bin:$PATH perl vpi_reg.pl
+
+    popd
+  '';
+
   meta = with stdenv.lib; {
     description = "Icarus Verilog compiler";
     homepage = "http://iverilog.icarus.com/";