2022-06-25 08:37:19 +01:00
|
|
|
# Copyright (c) Meta Platforms, Inc. and affiliates.
|
2022-11-02 00:05:16 +00:00
|
|
|
# SPDX-License-Identifier: LGPL-2.1-or-later
|
2022-06-25 08:37:19 +01:00
|
|
|
|
|
|
|
REGISTERS = [
|
|
|
|
*[DrgnRegister(f"x{i}") for i in range(29)],
|
|
|
|
DrgnRegister(["x29", "fp"]),
|
|
|
|
DrgnRegister(["x30", "lr"]),
|
|
|
|
DrgnRegister("sp"),
|
|
|
|
DrgnRegister("pstate"),
|
|
|
|
]
|
|
|
|
|
|
|
|
REGISTER_LAYOUT = [
|
2022-06-25 08:57:42 +01:00
|
|
|
DrgnRegisterLayout("ra_sign_state", size=8, dwarf_number=34),
|
2022-06-25 08:37:19 +01:00
|
|
|
DrgnRegisterLayout("sp", size=8, dwarf_number=31),
|
|
|
|
# Callee-saved registers.
|
|
|
|
*[DrgnRegisterLayout(f"x{i}", size=8, dwarf_number=i) for i in range(19, 31)],
|
|
|
|
# Caller-saved registers.
|
|
|
|
*[DrgnRegisterLayout(f"x{i}", size=8, dwarf_number=i) for i in range(19)],
|
|
|
|
# This pc register is only used for interrupted frames.
|
|
|
|
DrgnRegisterLayout("pc", size=8, dwarf_number=32),
|
|
|
|
DrgnRegisterLayout("pstate", size=8, dwarf_number=None),
|
|
|
|
]
|
2022-11-23 00:51:44 +00:00
|
|
|
|
|
|
|
STACK_POINTER_REGISTER = "sp"
|