2021-11-21 23:59:44 +00:00
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// Copyright (c) Meta Platforms, Inc. and affiliates.
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2021-04-03 09:10:35 +01:00
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// SPDX-License-Identifier: GPL-3.0-or-later
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2019-07-29 08:57:28 +01:00
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#ifndef DRGN_PLATFORM_H
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#define DRGN_PLATFORM_H
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2021-11-30 10:37:45 +00:00
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#include <inttypes.h>
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2020-09-24 00:02:02 +01:00
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#include <gelf.h>
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2019-07-29 08:57:28 +01:00
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2021-01-20 23:59:14 +00:00
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#include "cfi.h"
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2019-07-29 08:57:28 +01:00
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#include "drgn.h"
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2021-02-23 22:06:41 +00:00
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#include "util.h"
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2019-07-29 08:57:28 +01:00
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2021-03-16 22:39:37 +00:00
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struct drgn_orc_entry;
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2021-03-10 09:51:33 +00:00
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struct drgn_register_state;
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2019-10-18 10:03:32 +01:00
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struct drgn_register {
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libdrgn: define structure for storing processor register values
libdwfl stores registers in an array of uint64_t indexed by the DWARF
register number. This is suboptimal for a couple of reasons:
1. Although the DWARF specification states that registers should be
numbered for "optimal density", in practice this isn't the case. ABIs
include unused ranges of numbers and don't order registers based on
how likely they are to be known (e.g., caller-saved registers usually
aren't recovered while unwinding the stack, but they are often
numbered before callee-saved registers).
2. This precludes support for registers larger than 64 bits, like SSE
registers.
For our own unwinder, we want to store registers in an
architecture-specific format to solve both of these problems.
So, have each architecture define its layout with registers arranged for
space efficiency and convenience when parsing saved registers from core
dumps. Instead of generating an arch_foo.c file from arch_foo.c.in,
separately define the logical register order in an arch_foo.defs file,
and use it to generate an arch_foo.inc file that is included from
arch_foo.c. The layout is defined as a macro in arch_foo.c. While we're
here, drop some register definitions that aren't useful at the moment.
Then, define struct drgn_register_state to efficiently store registers
in the defined format.
Signed-off-by: Omar Sandoval <osandov@osandov.com>
2021-02-09 10:01:50 +00:00
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const char * const *names;
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size_t num_names;
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drgn_register_number regno;
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2021-01-28 23:49:21 +00:00
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uint64_t dwarf_number;
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2019-10-18 10:03:32 +01:00
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};
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libdrgn: define structure for storing processor register values
libdwfl stores registers in an array of uint64_t indexed by the DWARF
register number. This is suboptimal for a couple of reasons:
1. Although the DWARF specification states that registers should be
numbered for "optimal density", in practice this isn't the case. ABIs
include unused ranges of numbers and don't order registers based on
how likely they are to be known (e.g., caller-saved registers usually
aren't recovered while unwinding the stack, but they are often
numbered before callee-saved registers).
2. This precludes support for registers larger than 64 bits, like SSE
registers.
For our own unwinder, we want to store registers in an
architecture-specific format to solve both of these problems.
So, have each architecture define its layout with registers arranged for
space efficiency and convenience when parsing saved registers from core
dumps. Instead of generating an arch_foo.c file from arch_foo.c.in,
separately define the logical register order in an arch_foo.defs file,
and use it to generate an arch_foo.inc file that is included from
arch_foo.c. The layout is defined as a macro in arch_foo.c. While we're
here, drop some register definitions that aren't useful at the moment.
Then, define struct drgn_register_state to efficiently store registers
in the defined format.
Signed-off-by: Omar Sandoval <osandov@osandov.com>
2021-02-09 10:01:50 +00:00
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struct drgn_register_layout {
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uint32_t offset;
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uint32_t size;
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};
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2021-03-26 00:26:06 +00:00
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/* ELF section to apply relocations to. */
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struct drgn_relocating_section {
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char *buf;
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size_t buf_size;
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2021-03-26 17:28:10 +00:00
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uint64_t addr;
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2021-03-26 00:26:06 +00:00
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bool bswap;
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};
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2021-11-30 10:37:45 +00:00
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/*
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* Apply an ELF relocation as:
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*
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* - `*dst = addend + *r_addend` if `r_addend` is not `NULL` (for `ElfN_Rela`)
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* - `*dst += addend` if `r_addend` is `NULL` (for `ElfN_Rel`)
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*
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* Where `dst = (uintN_t *)(relocating->buf + r_offset)`.
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*
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* This checks bounds and handles unaligned destinations and byte swapping. It
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* does not check for overflow.
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*/
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struct drgn_error *
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drgn_reloc_add64(const struct drgn_relocating_section *relocating,
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uint64_t r_offset, const int64_t *r_addend, uint64_t addend);
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struct drgn_error *
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drgn_reloc_add32(const struct drgn_relocating_section *relocating,
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uint64_t r_offset, const int64_t *r_addend, uint32_t addend);
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#define DRGN_UNKNOWN_RELOCATION_TYPE(r_type) \
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drgn_error_format(DRGN_ERROR_OTHER, \
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"unknown relocation type %" PRIu32 " in %s; " \
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"please report this to %s", \
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(r_type), __func__, PACKAGE_BUGREPORT)
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/*
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* Apply an ELF relocation. If @p r_addend is `NULL`, then this is an `ElfN_Rel`
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* relocation. Otherwise, this is an `ElfN_Rela` relocation.
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*/
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2021-03-26 00:26:06 +00:00
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typedef struct drgn_error *
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2021-11-30 10:37:45 +00:00
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apply_elf_reloc_fn(const struct drgn_relocating_section *relocating,
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uint64_t r_offset, uint32_t r_type, const int64_t *r_addend,
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uint64_t sym_value);
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2021-03-26 00:26:06 +00:00
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2020-05-06 02:02:52 +01:00
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/* Page table iterator. */
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struct pgtable_iterator {
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struct drgn_program *prog;
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/* Address of the top-level page table to iterate. */
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uint64_t pgtable;
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/* Current virtual address to translate. */
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uint64_t virt_addr;
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/* Architecture-specific data. */
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2021-03-16 23:18:49 +00:00
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char arch[];
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2020-05-06 02:02:52 +01:00
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};
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/*
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* Translate the current virtual address from a page table iterator.
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*
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* Abstractly, a virtual address lies in a range of addresses in the address
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* space. A range may be a mapped page, a page table gap, or a range of invalid
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* addresses (e.g., non-canonical addresses on x86-64). This finds the range
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* containing the current virtual address, returns the first virtual address of
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* that range and the physical address it maps to (if any), and updates the
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* current virtual address to the end of the range.
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*
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* This does not merge contiguous ranges. For example, if two adjacent mapped
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* pages have adjacent physical addresses, this returns each page separately.
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* This makes it possible to distinguish between contiguous pages and "huge
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* pages" on architectures that support different page sizes. Similarly, if two
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* adjacent entries at level 2 of the page table are empty, this returns each
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* gap separately.
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*
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* @param[in] it Iterator.
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* @param[out] virt_addr_ret Returned first virtual address in the range
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* containing the current virtual address.
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* @param[out] phys_addr_ret Returned physical address that @p virt_addr_ret
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* maps to, or @c UINT64_MAX if it is not mapped.
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*/
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typedef struct drgn_error *
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(pgtable_iterator_next_fn)(struct pgtable_iterator *it, uint64_t *virt_addr_ret,
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uint64_t *phys_addr_ret);
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2019-07-29 08:57:28 +01:00
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struct drgn_architecture_info {
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const char *name;
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enum drgn_architecture arch;
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enum drgn_platform_flags default_flags;
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2019-10-18 10:03:32 +01:00
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const struct drgn_register *registers;
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size_t num_registers;
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const struct drgn_register *(*register_by_name)(const char *name);
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libdrgn: define structure for storing processor register values
libdwfl stores registers in an array of uint64_t indexed by the DWARF
register number. This is suboptimal for a couple of reasons:
1. Although the DWARF specification states that registers should be
numbered for "optimal density", in practice this isn't the case. ABIs
include unused ranges of numbers and don't order registers based on
how likely they are to be known (e.g., caller-saved registers usually
aren't recovered while unwinding the stack, but they are often
numbered before callee-saved registers).
2. This precludes support for registers larger than 64 bits, like SSE
registers.
For our own unwinder, we want to store registers in an
architecture-specific format to solve both of these problems.
So, have each architecture define its layout with registers arranged for
space efficiency and convenience when parsing saved registers from core
dumps. Instead of generating an arch_foo.c file from arch_foo.c.in,
separately define the logical register order in an arch_foo.defs file,
and use it to generate an arch_foo.inc file that is included from
arch_foo.c. The layout is defined as a macro in arch_foo.c. While we're
here, drop some register definitions that aren't useful at the moment.
Then, define struct drgn_register_state to efficiently store registers
in the defined format.
Signed-off-by: Omar Sandoval <osandov@osandov.com>
2021-02-09 10:01:50 +00:00
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const struct drgn_register_layout *register_layout;
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drgn_register_number (*dwarf_regno_to_internal)(uint64_t);
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2021-01-20 23:59:14 +00:00
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/* CFI row containing default rules for DWARF CFI. */
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2021-04-02 23:56:41 +01:00
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const struct drgn_cfi_row *default_dwarf_cfi_row;
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2021-03-16 22:39:37 +00:00
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struct drgn_error *(*orc_to_cfi)(const struct drgn_orc_entry *,
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struct drgn_cfi_row **, bool *,
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drgn_register_number *);
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2021-03-10 09:51:33 +00:00
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/*
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* Try to unwind a stack frame if CFI wasn't found. Returns &drgn_stop
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* if we couldn't.
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*/
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struct drgn_error *(*fallback_unwind)(struct drgn_program *,
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struct drgn_register_state *,
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struct drgn_register_state **);
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2020-05-19 21:28:49 +01:00
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/* Given pt_regs as a value buffer object. */
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2021-03-10 09:51:33 +00:00
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struct drgn_error *(*pt_regs_get_initial_registers)(const struct drgn_object *,
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struct drgn_register_state **);
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struct drgn_error *(*prstatus_get_initial_registers)(struct drgn_program *,
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2020-05-19 21:28:49 +01:00
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const void *,
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2021-03-10 09:51:33 +00:00
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size_t,
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struct drgn_register_state **);
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struct drgn_error *(*linux_kernel_get_initial_registers)(const struct drgn_object *,
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struct drgn_register_state **);
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2021-11-30 10:37:45 +00:00
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apply_elf_reloc_fn *apply_elf_reloc;
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2020-12-10 10:40:07 +00:00
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struct drgn_error *(*linux_kernel_get_page_offset)(struct drgn_object *);
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struct drgn_error *(*linux_kernel_get_vmemmap)(struct drgn_object *);
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2020-05-04 08:44:44 +01:00
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struct drgn_error *(*linux_kernel_live_direct_mapping_fallback)(struct drgn_program *,
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uint64_t *,
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uint64_t *);
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2020-05-06 02:02:52 +01:00
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/* Size to allocate for pgtable_iterator::arch. */
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size_t pgtable_iterator_arch_size;
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/* Initialize pgtable_iterator::arch. */
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void (*pgtable_iterator_arch_init)(void *buf);
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/* Iterate a (user or kernel) page table in the Linux kernel. */
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pgtable_iterator_next_fn *linux_kernel_pgtable_iterator_next;
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2019-07-29 08:57:28 +01:00
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};
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extern const struct drgn_architecture_info arch_info_unknown;
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extern const struct drgn_architecture_info arch_info_x86_64;
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2020-11-27 12:06:56 +00:00
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extern const struct drgn_architecture_info arch_info_ppc64;
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2019-07-29 08:57:28 +01:00
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struct drgn_platform {
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const struct drgn_architecture_info *arch;
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enum drgn_platform_flags flags;
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};
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2021-02-23 22:06:41 +00:00
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static inline bool
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drgn_platform_is_little_endian(const struct drgn_platform *platform)
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{
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return platform->flags & DRGN_PLATFORM_IS_LITTLE_ENDIAN;
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}
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static inline bool drgn_platform_bswap(const struct drgn_platform *platform)
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{
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return drgn_platform_is_little_endian(platform) != HOST_LITTLE_ENDIAN;
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}
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static inline bool drgn_platform_is_64_bit(const struct drgn_platform *platform)
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{
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return platform->flags & DRGN_PLATFORM_IS_64_BIT;
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}
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static inline uint8_t
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drgn_platform_address_size(const struct drgn_platform *platform)
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{
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return drgn_platform_is_64_bit(platform) ? 8 : 4;
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}
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static inline uint64_t
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drgn_platform_address_mask(const struct drgn_platform *platform)
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{
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return drgn_platform_is_64_bit(platform) ? UINT64_MAX : UINT32_MAX;
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}
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2019-07-29 08:57:28 +01:00
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/**
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* Initialize a @ref drgn_platform from an architecture, word size, and
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* endianness.
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*
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* The default flags for the architecture are used other than the word size and
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* endianness.
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*/
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void drgn_platform_from_arch(const struct drgn_architecture_info *arch,
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bool is_64_bit, bool is_little_endian,
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struct drgn_platform *ret);
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/** Initialize a @ref drgn_platform from an ELF header. */
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void drgn_platform_from_elf(GElf_Ehdr *ehdr, struct drgn_platform *ret);
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#endif /* DRGN_PLATFORM_H */
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